SINGLE-PHASE IMPULSE TIMER CIRCUIT, CIRCUIT FUNCTION DESCRIPTION 6.0
2-9.
a. Refer to figure 2-8. Power for the timer circuit is supplied by the SCR-timer
contactor. The supplies are positive (+) 20vdc and 12vac. All voltages are referenced
to the system common "N."
(1)
The 12vac supply is fed to an ac input of optocoupler OC1.
(2) The output of OC1 is coupled directly to one section of U1, a quad XOR
gate, which buffers and inverts the signal.
(3) The output is shaped by R9 and C4 and applied to the clock input of
flip-flop pin 3 of U2.
(4) The clock pulses are again inverted by another XOR gate of U1 and
become one of the inputs to each of the triple input NAND gates contained in U3.
(5) The 12vac supply is also rectified, clipped, and shaped by the
combination of D1, D2, D3, R3, and R2.
(6) The resulting wave form is applied to the CLR pin 4 of the flip-flop
contained in U2. This synchronizes the flip-flop so its output is in phase with the ac line.
(7) The output of flip-flop U2, pin 2, is a square wave which cycles at the
same rate as the line frequency whenever the system is turned on. This output is
compared with the output of flip-flop U2, pin 12, by an XOR gate in U1.
(8) The flip-flop U2, pin 12, is only clocked during an exposure, so the
output of the XOR gate U1, pin 10, will alternate at the same rate as flip-flop U2, pin 1,
except only during an exposure. This ensures each successive exposure will begin on
the opposite phase of the ac line from the last impulse of the previous one.
b. An exposure timing sequence begins with the application of 115vac from H6T
to optocoupler OC2.
(1) This causes the emitter output of OC2 to go high, raising the reset pin 10
of timer in U4 above 0.8vdc and applying a high signal to an input of the first triple-input
NAND gate U3 as well as to Q4 and Q3 on the SCR contactor.
(2) This last signal input generates the BAM signal to the backup timer.
OC2 also supplies the signal to another XOR gate of U1 which acts as a non-inverting
buffer to control reset pin 4 of timer U4 in section 2.
MD0351
2-20