(a) All synchronized timing signals for the digital monitor section originate
(b) The incoming analog signal is converted to an equivalent digital value
by the A/D section. This digital value is then stored in a 2000 byte (2K) memory device. If
the sync control section detects a sync marker pulse, it inhibits the A/D from outputting its
digitized analog value. In place of the A/D's output, the sync controller presents a unique
digital word to the memory device to be stored at the current memory location.
(c) The sync controller monitors the data as it is being read from the
memory device. When the sync controller recognizes the unique digital word which it
previously stored in memory, it outputs a pulse to the blanking controller. The blanking
controller, in turn, sends a signal to the blanking driver to temporarily blank the video trace,
thus marking the point when the original sync marker pulse was received.
(d) The memory addressing section generates the memory address at
which data is stored and from where data will be read. When the memory outputs data,
the memory addressing section drives the device so that it multiplexes data which
represents the video signal with data which represents the delayed signal. The memory
addressing section is also responsible for making the video signal appear to scroll from the
right to the left on the CRT screen.
(e) The D/A section converts the digital words output from the memory
device into an equivalent analog signal. The analog signal from the D/A converter consists
of the video signal and the delay signal multiplexed together. The signal demultiplexer
section separates the two signals which are each fed into their respective filter/amplifiers.
(f) The output from the vertical filter/amplifier is fed to the vertical
deflection amplifier, while the output from the delayed filter/amplifier is fed to the chart
recorder mode selector.
(g) The hold control section detects when the hold button is depressed.
When a hold is detected, the hold control section inhibits the memory addressing section
from scrolling the video signal on the CRT screen. It inhibits the signal demultiplexer
section from decoding the delayed signal and prevents the blanking controller from
blanking the video signal when a sync marker pulse has been detected.
(h) As mentioned before, the blanking controller sends a blanking pulse
to the blanking driver when it receives a signal from the sync controller. It will also send a
blanking pulse to the blanking driver whenever it receives a blanking signal from the timing
generator. The timing generator sends a blanking signal during horizontal retrace.