(b) Note that S4A and S4B and S5A and S5B are reciprocating
switches whose alternate functions will be described in the following sections. Lamp L3
illuminates whenever S3 is closed. S3/R3, S4A, and S5A are front-panel mounted, R2
is located on the printed circuit board, Q1 through 3 on heat sink #1, and M1 is chassis
mounted.
(3) Intermittent operation circuit. Refer to figure 2-1. Components S4B,
S5B, L4, and L5 comprise this circuit. In order to prevent dangerously high vacuum
levels from being presented to the patient, switches S4B and S5B must both be closed.
This guarantees intermittent operation can exist only in the low-vacuum mode. Lamp
L4 which is part of S5 illuminates in the intermittent mode and L5, which is part of S4,
illuminates when low vacuum is selected. All components in this section are front-panel
mounted.
NOTE:
The remaining descriptions apply to circuitry in use only during
intermittent operation.
(4) Five-volt power supply circuit. Refer to figure 2-1. Components R4, IC4
and C2 provide a regulated low-voltage power supply for the intermittent timing and
switching circuitry. Resistor R4 acts as a current limiter to the regulator input while C2
provides output-voltage filtering of transient power surges. The regulator output is
typically 4.8v at maximum low-vacuum levels (motor off), approximately 3v during motor
turn-on (initial surge), and rises to about 4.5v for the duration of the motor-on cycle. All
components are mounted to the printed circuit board.
(5) Clock oscillator circuit. Refer to figure 2-2. The clock oscillator is a 50
Hz, self-starting, square-wave generator consisting of 1C1 pins 8 through 13, R5, R6,
and C3. Its purpose is to provide an initiating input to the OFF-time monostable. 1C1 is
a quad-2 input NOR (not OR), dual in-line package. All components are mounted to the
printed circuit board (PCB).
(6) Type 555 timer operation. These integrated circuits are used as
functional monostables for the off-time and on-time circuits. When a negative impulse
brings the trigger input (pin 2) below 1/3 collector supply voltage (Vcc), the output (pin
3) goes to a high-logic level (Vcc). Simultaneously, the voltage across the timing
capacitor rises exponentially through the timing resistor and, after a period of time, the
comparator input (pins 6 and 7) reaches 2/3 Vcc, resetting the internal flip-flop, causing
the capacitor to discharge to ground and the output to return to a low-logic level
(ground). The timer, in this application, is sometimes 20 percent triggered when
intermittent operation is initiated, thus, the unit may cycle once before stabilizing to its
correct time period.
NOTE:
The following two paragraphs describe each timing circuit.
MD0365
2-7