(f) When the chart recorder selector switch SW1 is in the AUTO position,
the timer output drives pins 8 and 9 of U104. This enables the chart recorder switching
transistor Q110 to turn on.
(g) The second drive signal for U104 is taken from other positions of
SW1, which goes high in diagnostic or delayed chart recorder mode selection. This
activates either section of U113 for the correct signal to be recorded.
(h) U106 makes 3.5 conversions per second by internal frequency
dividers fed by the main clock. This conversion signal can be picked up at pin 28 and, by
sending it into a voltage comparator U110, converts it to be used as a clock signal for a
divide by 10 counter, U115. This counter is always reset by the QRS recognizer pulse.
(i) If an asystolic condition occurs, the reset is not accomplished, and
the counter advances to 5 which makes its pin 12 (C.O.) go low. This disables U119 so
U106 can update test when count 8 closes one section of U111. The signal input to U106
shorts and now reads 00.
(j) The following clock pulse drives the counter to 9 and inhibits any
further clock signal to be counted. When pins 11 and 13 of U115 go high, so does pin 1 of
U106 latching into the display the last reading which was 00.
(k) The latching signal also closes a section of U111 injecting +5v into
the comparator references, making both limit alarms go high, sounding the beeper, and
starting the chart recorder. That is, if it was in the AUTO mode showing the events from 5
seconds prior to the actual alarm condition.
(l) By using a separate asystolic alarm circuit, total independence is
gained from the heart rate meter time constants and number of bpm reading the moment
the heart failure occurred. The time from the moment that the lack of QRS is detected to
the moment the alarm sounds is fixed at 3.5 seconds approximately.
d. Functions of the Circuits in the Monitor Digital Logic.
(a) A high-going pulse (approximately 1 second in duration) applied to
U126 pin 11 and then inverted by U131 pins 13 and 12 produces a low-going pulse to
reset U130 at pin 13.
(b) Upon power-up, C226 is fully discharged, and a valid high logic lever
is applied to pin 9 of U132. Pin 10 of U132 is also at a valid high logic level at the moment